Timeline for Can Frameless rendering reduce latency? And, can FPGA do 3D rendering instead of GPU?
Current License: CC BY-SA 3.0
11 events
when toggle format | what | by | license | comment | |
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Apr 10, 2016 at 15:17 | comment | added | RichieSams | No, just any chip. It could be a modified GPU. When I say 'real', I just mean that it's silicon logic, rather than programmed logic, ie. a FPGA. | |
Apr 8, 2016 at 0:31 | comment | added | Hao Zhang | You say "real hardware", does it mean ASIC? | |
Apr 7, 2016 at 14:59 | comment | added | RichieSams | As Nathan mentioned in his anwer, in order to "race the beam", you need a very tight synchronization of the "graphics hardware" and the OS/CPU. Current GPUs and Graphics APIs don't have this support. So the authors created the hardware themselves using a FPGA. In theory, the hardware they created in FPGA could be manufactured into "real" hardware. | |
Apr 7, 2016 at 6:38 | comment | added | Hao Zhang | It seems that in second paper the authors used "ray casting" instead of rasterization. So they used FPGA directly, not emulate a GPU? And it also seems they didn't support any API like OpenGL or DirectX. Do you mean the authors just need FPGA to "race the beam"? | |
Apr 7, 2016 at 6:24 | vote | accept | Hao Zhang | ||
Apr 6, 2016 at 17:52 | answer | added | Nathan Reed | timeline score: 5 | |
Apr 6, 2016 at 17:23 | history | edited | Nathan Reed | CC BY-SA 3.0 |
added 144 characters in body
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Apr 6, 2016 at 17:13 | history | edited | Nathan Reed | CC BY-SA 3.0 |
added link to the paper
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Apr 6, 2016 at 14:24 | comment | added | RichieSams | The reason they're using a FPGA, is they require hardware features that the GPU does not have. So they emulate a GPU using a FPGA. | |
Apr 6, 2016 at 9:56 | history | edited | Hao Zhang | CC BY-SA 3.0 |
some words corrections
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Apr 6, 2016 at 9:16 | history | asked | Hao Zhang | CC BY-SA 3.0 |