Using multiply and accumulate of 4x4 matrices for ray-triangle intersection tests on GPU

Question

Is it possible to gain performance boost using new 4x4 MAD from NVIDIA'a tensor cores for ray-triangle intersection tests?

Really there are two questions:

• Is it possible to modify some of the ray-triangle algorithms (say, Möller-Trumbore algorithm) to base it on 4x4 matrix MAD.
• Would it be a performance improvement?

Answer 1

Yes, it is possible. For one however, Möller-Trumbore is not the only algorithm out there for ray triangle intersection, there exist others.

However all of these rely on linear algebra vector multiplications and matrix operations. These can be combined into 4x4 tensor core operations (and each tensor core can do 4x4x4, but there are 8 cuda cores to every tensor core). You can compute multiple intersections in Möller-Trumbore at a time with tensor cores. You could say, combine multiple cross products or dot products into a single matrix operation.

The catches? Well first, the precision of tensor cores matrix multiplication is 16bit float. But don't fret, given decent spatial subdivision of, say, a raytraced environment, that precision should only matter per spatial block/voxel/subdivision which is necessary in ray-tracing in order to not test all triangles in the scene. 16 bit for a 10 km area might be a big deal in terms of poor position precision, but for a 2x2 meter area it isn't (mantissa alone will handle 1024 different values). Note the addition part is 32bit float.

Second, you have to move data around in such a way that tensor cores can actually access it, which, because it is unlikely that any of us on this entire site have direct access to a machine with tensorcores, has a yet unknown performance cost.

Third, I'm not entirely sure its possible to do both tensor core calculations and scalar calculations at the same time. This could end up slowing many tasks to the point that any advantage tensor cores gave becomes negligible. But I could be wrong and we can actually hide things like latency for tensor core memory moves with multiple floating point and tensor core instructions interleaved.